Junior Digital Verification Engineer
SamsungSamsung Israel R&D Center- SIRCПолная занятость
PythonLinuxHardwareSystemVerilogUVMCadenceMemoryDigital VerificationSSDeMMC/UFSFlash memory
Описание
Samsung R&D Center is looking for Junior Digital Verification Engineer to join our Memory team, focusing on Flash memory division products like SSD, eMMC/UFS, and emerging memory products. The center also conducts research and development of signal processing algorithms and system architecture for Samsung’s next generation platforms.
Responsibilities
- Join the full verification cycle for complex digital designs, from initial verification planning and test execution through to rigorous coverage closure
- Implement SystemVerilog Assertions (SVA) and drive deep code coverage analysis
- Debug complex tests and trace analysis alongside design engineers to deliver functionally pristine blocks and finalize regressions
- Collaborate closely with design and algorithm engineers
- Continuously expand your technical expertise by tackling increasingly complex verification challenges in a highly collaborative environment
Requirements
- BSc in Electrical Engineering or Computer Engineering from leading university
- High ambition, passion for solving complex hardware challenges, and a proven motivation to learn and adapt to new technologies
Nice to have
- Scripting skills in Python and experience with Linux/Unix environments
- Hands-on experience in SystemVerilog and UVM
- Experience with Cadence tools such as Xcelium, vManager, and Indago
We offer
- Work with innovative and top caliber memory experts in a collegial and fun environment
- Work on challenging and innovative solutions for cutting-edge hardware of Samsung world-class memory products
- Work in a dynamic team that provides continuous opportunities for learning and growth