Senior Package Layout Engineer

Описание

NVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join their package team and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products.

Responsibilities

• Collaborate to implement high speed and PDN design for ASIC packages
• Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools
• Optimize package pin out incorporating system level trade-offs of pins assignment
• Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations
• In close co-operation with the SI/PI/HW design teams and product teams
• Planning, ensuring stakeholder management and leading projects from start to finish

Requirements

• B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience
• 5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices
• Experience in substrate layout of wire bond and flip chip packages, preferred
• Knowledge in substrates or board manufacturing process
• Significant background with Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools

Nice to have

• Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools
• Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting)

We offer

• NVIDIA has some of the most forward-thinking and hardworking people in the world working for them and, due to unprecedented growth, their exclusive engineering teams are rapidly growing