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Modeling

Toga NetworksHod Hasharon
AIMicro-architectureChip ArchitecturesystemCHW modeling

Описание

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.

Responsibilities

  • Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

Requirements

  • Experience in HW modeling using systemC, including all stages of backend flow: synthesis and power measurements. Experience with working in a team with various discipline. Having good communication skills. Hands on and self contained.