Formal Verification Technical Lead

Описание

This role involves leading formal verification efforts for System-on-a-chip (SoC) designs, identifying targets, and completing formal verification for design blocks and IPs.

Responsibilities

• Work with design engineers to develop a formal micro-architecture specification
• Formalize the refinement from architecture to micro-architecture
• Develop comprehensive formal verification test plan
• Prove properties of the design, find design bugs, and work closely with design teams to help improve the micro-architecture
• Craft novel and creative solutions for verifying complex design micro-architectures
• Develop and implement re-usable and optimized formal models and verification code base
• Architect correct-by-construction design methodologies for improved formal verification efficiency and productivity

Requirements

• Outstanding team leading and communication skills and experience working with design and verification teams to identify FV candidates, develop test plans and perform data-centric verification closure
• Hands on experience with VLSI and digital logic design and verification techniques
• Advanced knowledge of SoC, CPU, GPU, or Cellular designs
• Developed formal property proofs on industrial strength designs and architectures
• Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms
• Confirmed understanding of formal verification technologies/abstraction techniques
• Knowledge and experience in interpreting hardware specifications and using Temporal logic assertion-based languages such as SVA or PSL
• Proficiency in any scripting language with excellent debugging skills
• Extraordinary teammate with excellent interpersonal skills
• Passionate about developing world-class/innovative formal verification solutions

Nice to have

• Experience in using EDA formal tools and tool development experience is a plus
• Understanding of application processors (CPU/GPU), their Instruction Set Architectures (ISA), Memory Consistency Models (MCM) or Cache Coherence protocols is desirable but not necessary
• Exposure to ARM type architectures is desirable but not necessary
• MS / Ph.D in EE or CS is preferred

We offer

• Accessibility is a fundamental human right at Apple, reflected in culture, benefits and digital tools

Hiring process

• Submit Resume