ML Deployment Engineer, Edge AI - Q

Описание

This team works at the intersection of machine learning, hardware, and software, creating technologies that reshape how people communicate and experience the world around them.

Responsibilities

• Own the model deployment pipeline from trained checkpoint to on-device execution, ensuring models meet product-quality bars for accuracy, latency, memory, and power
• Apply model compression techniques

GÇö quantization (post-training and calibration-based), palettization, pruning, and mixed-precision GÇö and validate the accuracy/size/latency trade-offs of each

• Convert and compile models to the Core ML stack and target the Apple Neural Engine, GPU, and CPU
• Analyze and maximize accelerator (ANE) residency; diagnose why operations are rejected or dispatched to fallback compute units, and work with the graph to resolve them
• Profile end-to-end inference on real hardware, identify bottlenecks, and optimize compute-unit placement, memory footprint, and energy consumption
• Collaborate closely with ML research and applied ML to co-design models that are efficient to deploy and to feed hardware constraints back into model architecture decisions
• Build and maintain tooling and automation for reproducible compression, compilation, benchmarking, and numerical validation
• Stay current with the latest advances in efficient ML inference, model compression, and accelerator architectures

Requirements

• Bachelor

GÇÖs or Master GÇÖs degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience

• 5+ years of professional experience deploying machine learning models to production, with a significant focus on on-device, edge, or otherwise resource-constrained environments
• Strong programming skills in Python and C/C++
• Solid understanding of deep learning fundamentals and hands-on experience with a modern ML framework (e.g., PyTorch)
• Practical experience with model compression and optimization

GÇö quantization, pruning, palettization, or mixed-precision GÇö and a working understanding of floating-point and fixed-point/integer numerics and the quality trade-offs involved

• Experience taking models through a conversion and compilation toolchain to a hardware target (e.g., Core ML, TensorRT, TFLite, ONNX Runtime, or similar)
• Demonstrated ability to profile and optimize code and models against strict latency, memory, and power constraints
• Strong debugging skills and comfort working at the boundary between ML models, compilers, and hardware
• Hands-on experience deploying to hardware accelerators / NPUs, and familiarity with the Apple Neural Engine (ANE), GPU, and CPU compute paths

Nice to have

• Experience with the Core ML toolchain and with inspecting or transforming model IRs (i.e MLIR) and writing custom graph passes
• Familiarity with reading and reasoning about compiler analytics

GÇö diagnosing operator fallback, layout, and residency issues on an accelerator

• Experience with calibration or data-based compression methods (e.g., GPTQ, activation quantization, sparsity) and layer-wise sensitivity analysis
• Background in on-device LLMs or generative models, including tokenization, KV-cache, and quantized inference
• Experience building benchmarking, numerical-validation, and CI tooling for model deployment
• Familiarity with low-level compute kernels, SoC memory hierarchies, and hardware-software co-design
• Excellent problem-solving skills, strong communication and teamwork, and a passion for building innovative products